In any ECC system, both the encoder and decoder can be parallelized to achieve higher performance. The level of parallelism in the encoder can vary from 1 to K where K is the number of symbols in a message. The Encoder Parallelization Level will be referred to as EPL.
The level of parallelism in the decoder can vary from 1 to N where N is the number of symbols in a codeword and received word. The Decoder Parallelization Level will be referred to as DPL.
There can be from 1 to N serial channels.
The drawing below illustrates a serial encoder and decoder with one serial channel.
The drawing below illustrates a partially parallelized encoder and decoder with one serial channel.
The drawing below illustrates a fully parallelized encoder and decoder with one serial channel.
The drawing below illustrates a fully parallelized encoder and decoder with N parallel channels like the parallel RS implementations used to create fauilt-tolerant communications or storage systems.
Many encoder, channel and decoder configurations are possible, but normally the EPL=DPL and is determined by the peformance requirements of the system.
EPL and DPL are not the same as the PPU Parallelization Level.