Embedded Files
The image above is an actual image from the James Webb Space Telescope (JWST). To the best of my knowledge, all the data collected by the JWST is being encoded and decoded by error-correcting circuits I licensed to NASA which correct random errors and errors caused by chip failures.
If you are accessing this site from a phone or tablet, you need to touch the three short horizontal bars in the upper left corner to access the navigation panel.
I have been involved with error-correcting codes for more than 50 years - since 1973 - and have developed and licensed C and synthesizable Verilog code for many encoder and decoder designs and ECC design tools. I've consulted with Dr. Elwyn Berlekamp (co-inventor of the Berlekamp-Massey algorithm), Dr. Robert McEliece, and Dr. R.T. Chien (inventor of the "Chien Search").
I started a Minnesota corporation in 1990 named ECC Technologies, Inc. (ECC Tek) to license software and hardware designs for encoding and decoding Reed-Solomon (RS) and binary BCH (bBCH) error-correcting codes (ECC). Software was written in C and hardware was described in synthesizable Verilog.
In 1998, a US Patent was granted on parallelizing and pipelining RS encoders and decoders.
ECC Tek was dissolved in 2018, and all of its intellectual property was assigned to me.
I would like to find an individual or company that would be interested in developing products which need the IP I've developed such as a failure-tolerant storage device as shown below where multiple USB Sticks can fail with no loss of data or performance.
Unlike coding theorists and pure mathematicians, I am a practical digital design engineer, and my focus has been on developing practical, down-to-earth designs described in synthesizable Verilog and in developing ECC tools written in C to simulate and test the designs and also to help in developing new designs.
The following NASA missions are using error correction designs I developed:
JWST (James Webb Space Telescope)
SDO (Solar Dynamic Observatory)
LRO (Lunar Reconnaissance Orbiter)
GPM (Global Precipitation Measurement)
MMS (Magnetospheric MultiScale)
The following is a list of companies that have licensed error correction encoder and decoder designs or other IP I developed:
Ampex
BAE Systems
Broadcom
Conexant Systems, Inc.
CTX Research Limited
Hardent
InCOMM Technologies Company, Ltd
Indra Networks
Initio, Inc.
MaxLinear
Maxwell Technologies
Mercury Systems
Pliant Logic, Inc.
Provigent Ltd. (Israel)
Raytheon Company, Space and Airborne Systems
RMI
Sarnoff Digital Communications, Inc.
Spansion
Tamba Networks
Thstyme Bermuda, Inc.
Unwired Technology, LLC
Virident
All parties who have licensed designs from me are happy with the results, and the performance of my designs usually exceeds their performance requirements.
The IP I own includes the following items:
RS for Failure-Tolerant Memories, SSDs and HDDs as used by NASA
RS for Digital Video Broadcasting (DVB) Compliant to European Telecommunications Standard ETS 300 421:1994
How to use my tools to develop ECC/FEC for DisplayPort or HDMI
Various Binary BCH designs for NAND Flash
Adaptable RS Design for Local and Metropolitan Area Networks Compliant to the IEEE 802.16/D4-2001 Standard
RS for 100 Gb/s Backplanes and Copper Cables Compliant to IEEE 802.3bj-2014 and 802.3bk-2013 Standards
RS and Binary BCH Simulation software written in C
ECC design tools written in C
ECC Know-How
Since some of the existing designs were developed a number of years ago before the ECC design tools were developed, I would recommend using the most recent IP to develop any type of RS or binary BCH design you may need although the existing designs can be synthesized immediately with no development effort.
Page updated
Google Sites
Report abuse